timer_oc_set_mode is called with a channel variable from 1-4. The code
uint8 bit1 = (channel >> 1) & 1;
/* channel == 1,2 -> CCMR1; channel == 3,4 -> CCMR2 */
__io uint32 *ccmr = &(dev->regs).gen->CCMR1 + bit1;
is buggy, as 1 and 2 differ in bit 1, so channel 1 and 2 do not use the same CCMR register, as they should. Use
uint8 bit1 = ((channel-1) >> 1) & 1;
instead.