dreamcat, no offense to the very diligent rep from impulse, but we have no intention of fooling around with or promoting impulseC on our end. One of our goals with Oak is to start moving FPGAs in the free software direction - this would be counterproductive.
Obviously the users are always free to use the product however they wish and hopefully share their work! However, if you are interested going from a more familiar programming environment to HDL I recommend myHDL (python->HDL). myHDL is free software and we have some experience with it. There is a good chance there will official support for using myHDL to write core for Oak, but I cannot guarantee that.
Generally, though, the main utility of c/python->HDL compilers (particularly enterprise stuff like impulseC) is spot-accelerate large code bases - profile the code, find the bottlenecks, autocompile from c->hdl, and offload to FPGA. Right now, our main goal with Oak is integrating the FPGA into the rest of the Maple environment, not solving the HDL problem. However, I would like to devote some spare cycles towards a graphical programming tool for Oak - something with semantics similar to max/msp/PD.
