Maple with a xilinx fpga are in the latter designs could ROCC 2.0 be used to convert Linear discriminent analisis c++ code from alglib library to something that can be vhdl for the xilinx to run next to the maple so the maple can get the numbers ready for the LDA Xilinx system? Has anyone tried ROCC yet?
Maple with a xilinx fpga are in the latter designs could ROCC 2.0 be used to con
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