There should be some low level registers that indicate when transmission is busy/completed, and these can be configured to fire interrupts if you want them to. This is probably best configured with the DMA (so you can toggle CS around mutli-byte transmissions), which will have library support soon. But the temporary hack solution is to just poll the status registers. I should point out that the USART's can be configured to automatically control the CS lines, with some more hacking - since the frontend for that is not provided by the library.
the register you want is the "SR" register of the given USART port you are using (1, 2, or 3). The TC bit (bit 6) of the SR register indicates whether or not the transfer is complete (which you can use to determine when to manually toggle any CS line).
The standard USART regmap can be typedefed like this:
/* peripheral register struct */
typedef struct usart_port {
volatile uint32 SR; // Status register
volatile uint32 DR; // Data register
volatile uint32 BRR; // Baud rate register
volatile uint32 CR1; // Control register 1
volatile uint32 CR2; // Control register 2
volatile uint32 CR3; // Control register 3
volatile uint32 GTPR; // Guard time and prescaler register
} usart_port;
and youll want to setup the object like this:
usart_port *myPort = (usart_port*)(ADDR);
where ADDR is one of:
#define USART1_BASE 0x40013800
#define USART2_BASE 0x40004400
#define USART3_BASE 0x40004800
#define UART4_BASE 0x40004C00 // High-density devices only (Maple Native)
#define UART5_BASE 0x40005000 // High-density devices only (Maple Native)