bobricius - "What you think that Fst-01 haven't transistor in disconnect circuit?"
I'm not clear what you are asking. I am not a 'proper' Electronic Engineer. I try to think of use cases where conservative assumptions are the safest and most reliable. So my answers might not be relevant.
To help you and this thread along, I will try to answer what I think you might be asking.
The USB interface circuit has to do two jobs:
1. Enable programs, run on the the STM32F, to pull-up the resistor (Rup) which pulls-up the correct USB line which is critical during device 'initialisation' (which triggers USB enumeration).
2. Protect the board from ESD coming through the USB socket on any of the 4 signals: D+, D-, Ground and Vusb (and protect the host USB interface too, though I'd expect the host USB interface to have ESD protection)
I believe the circuit on Orone-mini does the best job at 2 because that is the only one where Vusb is connected to the ESD protection device. However, based on postings on this forum, I have no evidence that this is a real problem.
The USB spec says about the 'upstream' (e.g. Orone-mini) USB device:
"A device may use a 1.5K resistor tied to voltage source between 3.0 V and 3.6 V (Vterm) ..."
Let's look at the circuit at http://www.seeedstudio.com/wiki/images/b/b0/Fst-01-schematic.png which pulls up the Rup resistor (within the NUF2221W1) using a GPIO.
I don't believe this circuit, which uses a GPIO pin to pull-up the Rup resistor, is as robust the NUF2042XV6, or STF202 circuit. Both of those pull the resistor up to 3.3V using a PNP transistor with a VCEsat (collector-emitter saturation voltage) of 0.15V. So Rup should be pulled to 3.15V, a small safety margin above 3.0V.
The spec for the STM32F103 GPIO says, in "Table 36. Output voltage characteristics", that under heavier loads, the GPIO pin might not reach 3.0V (2.9V minimum for a moderate load, or 2V minimum for a very heavy load are specified).
I would expect USB hosts to be relatively forgiving. However the STM32F could be within its operating specification, and still fail to pull up Rup by a (worst case) margin of 1V. This might be unpleasant to debug. Small parts of the system tested 'in isolation' may work, and only when the loads across the entire system are combined (and it may be transient), the the board might trigger the host to enumerate the (STM32F Full-speed USB) device. I imagine this is extremely unlikely, but may be hard to debug.
I try to be conservative on hardware design. I would rather use a transistor and some PCB area to get an extra 0.25V (or 1.15V) 'headroom' to avoid that situation.
However, I'd expect most real USB host electronics to be more tolerant than the USB specification demands. So I would expect everything would be fine in the vast majority of cases, and it would very, very likely work to pull-up Rup with a GPIO pin.