Using the CAN interface « LeafLabs Garden

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Using the CAN interface

(103 posts) (27 voices)

Started 4 years ago by tmbomber
Latest reply from Phono

tmbomber
Member

Hello Everybody!

New to the fourms. Thought I'd post a note on what I'm doing.

I've been designing embedded micro-controller boards for ages. I've mostly been using Motorola 68xx, 68xxx, and Rabbit processors. Just recently a friend turned me on to Arduinos. I have two Uno's, a Mega, a Pro, and a Sanguino. About two weeks ago I designed my first Atmel based board using a '644 like on the Sanguino. (Incorporating an automotive LIN bus driver. Hacking newsoftserial to handle 10400 baud along the way)

(Have a look: http://cpriii.com/gg/PE2116A.zip :)

I have a red hot project requiring that I design a small controller board that can (among other things) interface to an automotive CAN bus. I've done several boards using an MCP2515 and an 82C251 (sometimes an AU5790) The thing is, this time I need to make it *really* small. Just last week I saw SparkFun's new product video and they mentioned the Maple. In reviewing the boards specifications I see that it has a built in CAN interface. (Hey! built in means less real estate!) So I've ordered a pair of Maple boards along with a JTAG programmer from Sparkfun. (I picked up an Olimex JTAG programmer as well, http://www.sparkfun.com/products/7834 ) I'm expecting delivery tomorrow morning.

Unfortunately, I also noticed that it's pins are shared with the USB interface.

I went digging through all 37 pages of the forums here, looking to see if anybody had done anything already. I found a few threads, but nothing really helpful. (I found the thread that talked about the JTAG adapter to use with the Olimex programmer as well. I'll be building or ordering one of those :)

For development, I'm planning on taking one of the Maple boards and removing R7, 13, 14, and C9 & 10. Soldering in zero ohm resistors for R13 & 14. That will allow me to connect a breakout board for an 82C251 to what use to be the USB connector.

Obviously, programming the board via the USB connector isn't going to be working any more. What I need to know is if there's any good examples or howto's showing how to switch from using the IDE with a USB cable to using the IDE with a JTAG of FTDI cable.

Given time I'm sure I could figure this out on my own, but I'm under a deadline to start design and development of a new card and need to hit the ground running. Any suggestions y'all could offer for programming with a JTAG or FTDI cable would be greatly appreciated.

Thank you!!!

Posted 4 years ago #
mbolivar
LeafLabs
hey tmbomber,

welcome to the forums! thanks for joining.

instead of hacking the board, you may be able to just get away with remapping the CAN peripheral. here's some (uncompiled) example code to illustrate the idea:
```
#include "gpio.h"

void setup() {
   // chooses the first out of 2 possible CAN remaps.
   // reroutes CAN_RX to PB8 (maple pin 14), and
   // CAN_TX to PB9 (maple pin 24)
   afio_remap(AFIO_REMAP_CAN_1);
}
```
you can't use the IDE with JTAG in any straightforward way. if you're going to use JTAG, your best bet is to use the command-line toolchain:

http://leaflabs.com/docs/unix-toolchain.html

there's a wiki page on using eclipse to wrap the command line tools up which you may find useful:

http://wiki.leaflabs.com/index.php?title=Edit_sketches_with_Eclipse

in any case, be aware that (as it stands with IDE 0.0.10) you're going to need to hack the libmaple code to get CAN working, since it shares an interrupt with USB, and right now, we rather arrogantly assume that you'd rather have our USB virtual serial terminal than use CAN ;). there's been some discussion elsewhere on the forum for how to resolve that situation, but i haven't implemented it yet.

here's a pointer to where you'll need to start; i'm happy to help out as you go along:

https://github.com/leaflabs/libmaple/blob/0.0.10/libmaple/usb/usb.c#L242

there's a ticket to redo the whole USB stack, but it's not going to happen before version 0.1.0, which doesn't have a release date yet:

http://code.google.com/p/leaflabs/issues/detail?id=10
Posted 4 years ago #
x893
Member

To support CAN need some changes in libmaple core (i use 0.0.9 version) so it may be some prolems. i use next files to operate with CAN
1. HardwareCAN.h

/**
* @brief HardwareCAN definitions
*/

#ifndef _HARDWARECAN_H_
#define _HARDWARECAN_H_

#include "can.h"

#define PID_REQUEST 0x7DF
#define PID_REPLY 0x7E8

#define ENGINE_COOLANT_TEMP 0x05
#define ENGINE_RPM 0x0C
#define VEHICLE_SPEED 0x0D
#define MAF_SENSOR 0x10
#define O2_VOLTAGE 0x14
#define THROTTLE 0x11

/**
* Defines the possible SPI communication speeds.
*/

class HardwareCAN
{
private:
public:
CAN_Port* Port;
HardwareCAN(CAN_Port *CANx_BASE);
CAN_STATUS begin(void);

uint32 MSR(void)
{
return Port->MSR;
}
uint32 RF0R(void)
{
return Port->RF0R;
}

void set_pool_mode(void);
void set_irq_mode(void);

CAN_STATUS begin(CAN_SPEED speed, uint32 mode);
void end(void);

CAN_STATUS filter(uint8 idx, uint32 id, uint32 mask);
CAN_STATUS map(CAN_GPIO_MAP remap);
CAN_STATUS status(void);

CAN_TX_MBX send(CanMsg* message);
void cancel(CAN_TX_MBX mbx);

uint8 available(void);

CanMsg* recv(void);

void free(void);
void clear(void);

uint8 fifo_ready(CAN_FIFO fifo);
CanMsg* read(CAN_FIFO fifo, CanMsg* msg);
void release(CAN_FIFO fifo);

uint8 request_ECU(uint8 pid, uint8 *buffer);
};

#endif

Posted 4 years ago #
x893
Member

2. can.h

#ifndef _CAN_H_
#define _CAN_H_

#ifdef __cplusplus
extern "C" {
#endif

#ifndef CAN_RX_QUEUE_SIZE
#define CAN_RX_QUEUE_SIZE 8
#endif

/* peripheral addresses */
#define CAN1_BASE ((CAN_Port*)0x40006400)
// #define CAN2_BASE ((CAN_Port*)0x40006800)

/* CAN Master Control Register bits */
#define CAN_MCR_INRQ ((uint32)0x00000001) /* Initialization request */
#define CAN_MCR_SLEEP ((uint32)0x00000002) /* Sleep mode request */
#define CAN_MCR_TXFP ((uint32)0x00000004) /* Transmit FIFO priority */
#define CAN_MCR_RFLM ((uint32)0x00000008) /* Receive FIFO locked mode */
#define CAN_MCR_NART ((uint32)0x00000010) /* No automatic retransmission */
#define CAN_MCR_AWUM ((uint32)0x00000020) /* Automatic wake up mode */
#define CAN_MCR_ABOM ((uint32)0x00000040) /* Automatic bus-off management */
#define CAN_MCR_TTCM ((uint32)0x00000080) /* Time triggered communication mode */
#define CAN_MCR_RESET ((uint32)0x00008000) /* bxCAN software master reset */
#define CAN_MCR_DBF ((uint32)0x00010000) /* Debug freeze */

/* CAN Master Status Register bits */
#define CAN_MSR_INAK ((uint32)0x00000001) /* Initialization acknowledge */
#define CAN_MSR_SLAK ((uint32)0x00000002) /* Sleep acknowledge */
#define CAN_MSR_ERRI ((uint32)0x00000004) /* Error interrupt */
#define CAN_MSR_WKUI ((uint32)0x00000008) /* Wake-up interrupt */
#define CAN_MSR_SLAKI ((uint32)0x00000010) /* Sleep acknowledge interrupt */
#define CAN_MSR_TXM ((uint32)0x00000100) /* Transmit mode */
#define CAN_MSR_RXM ((uint32)0x00000200) /* Receive mode */
#define CAN_MSR_SAMP ((uint32)0x00000400) /* Last sample point */
#define CAN_MSR_RX ((uint32)0x00000800) /* CAN Rx signal */

/* CAN Transmit Status Register bits */
#define CAN_TSR_RQCP0 ((uint32)0x00000001) /* Request completed mailbox0 */
#define CAN_TSR_TXOK0 ((uint32)0x00000002) /* Transmission OK of mailbox0 */
#define CAN_TSR_ALST0 ((uint32)0x00000004) /* Arbitration Lost for Mailbox0 */
#define CAN_TSR_TERR0 ((uint32)0x00000008) /* Transmission Error of Mailbox0 */
#define CAN_TSR_ABRQ0 ((uint32)0x00000080) /* Abort request for mailbox0 */
#define CAN_TSR_RQCP1 ((uint32)0x00000100) /* Request completed mailbox1 */
#define CAN_TSR_TXOK1 ((uint32)0x00000200) /* Transmission OK of mailbox1 */
#define CAN_TSR_ALST1 ((uint32)0x00000400) /* Arbitration Lost for Mailbox1 */
#define CAN_TSR_TERR1 ((uint32)0x00000800) /* Transmission Error of Mailbox1 */
#define CAN_TSR_ABRQ1 ((uint32)0x00008000) /* Abort request for mailbox1 */
#define CAN_TSR_RQCP2 ((uint32)0x00010000) /* Request completed mailbox2 */
#define CAN_TSR_TXOK2 ((uint32)0x00020000) /* Transmission OK of mailbox2 */
#define CAN_TSR_ALST2 ((uint32)0x00040000) /* Arbitration Lost for mailbox 2 */
#define CAN_TSR_TERR2 ((uint32)0x00080000) /* Transmission Error of Mailbox 2 */
#define CAN_TSR_ABRQ2 ((uint32)0x00800000) /* Abort request for mailbox2 */
#define CAN_TSR_CODE ((uint32)0x03000000) /* Mailbox Code */
#define CAN_TSR_TME ((uint32)0x1C000000) /* TME[2:0] bits */
#define CAN_TSR_TME0 ((uint32)0x04000000) /* Transmit mailbox 0 empty */
#define CAN_TSR_TME1 ((uint32)0x08000000) /* Transmit mailbox 1 empty */
#define CAN_TSR_TME2 ((uint32)0x10000000) /* Transmit mailbox 2 empty */
#define CAN_TSR_LOW ((uint32)0xE0000000) /* LOW[2:0] bits */
#define CAN_TSR_LOW0 ((uint32)0x20000000) /* Lowest Priority Flag for Mailbox 0 */
#define CAN_TSR_LOW1 ((uint32)0x40000000) /* Lowest Priority Flag for Mailbox 1 */
#define CAN_TSR_LOW2 ((uint32)0x80000000) /* Lowest Priority Flag for Mailbox 2 */

/* CAN Receive FIFO 0 Register bits */
#define CAN_RF0R_FMP0 ((uint32)0x00000003) /* FIFO 0 message pending */
#define CAN_RF0R_FULL0 ((uint32)0x00000008) /* FIFO 0 full */
#define CAN_RF0R_FOVR0 ((uint32)0x00000010) /* FIFO 0 overrun */
#define CAN_RF0R_RFOM0 ((uint32)0x00000020) /* Release FIFO 0 output mailbox */

/* CAN Receive FIFO 1 Register bits */
#define CAN_RF1R_FMP1 ((uint32)0x00000003) /* FIFO 1 message pending */
#define CAN_RF1R_FULL1 ((uint32)0x00000008) /* FIFO 1 full */
#define CAN_RF1R_FOVR1 ((uint32)0x00000010) /* FIFO 1 overrun */
#define CAN_RF1R_RFOM1 ((uint32)0x00000020) /* Release FIFO 1 output mailbox */

/* CAN Error Status Register bits */
#define CAN_ESR_EWGF ((uint32)0x00000001) /* Error warning flag */
#define CAN_ESR_EPVF ((uint32)0x00000002) /* Error passive flag */
#define CAN_ESR_BOFF ((uint32)0x00000004) /* Bus-off flag */

/* CAN interrupt enable register (CAN_IER) */
#define CAN_IER_TMEIE ((uint32)0x00000001) /* Transmit Mailbox Empty Interrupt Enable */
#define CAN_IER_FMPIE0 ((uint32)0x00000002) /* FIFO Message Pending Interrupt Enable */
#define CAN_IER_FFIE0 ((uint32)0x00000004) /* FIFO Full Interrupt Enable */
#define CAN_IER_FOVIE0 ((uint32)0x00000008) /* FIFO Overrun Interrupt Enable */
#define CAN_IER_FMPIE1 ((uint32)0x00000010) /* FIFO Message Pending Interrupt Enable */
#define CAN_IER_FFIE1 ((uint32)0x00000020) /* FIFO Full Interrupt Enable */
#define CAN_IER_FOVIE1 ((uint32)0x00000040) /* FIFO Overrun Interrupt Enable */
#define CAN_IER_EWGIE ((uint32)0x00000100) /* Error Warning Interrupt Enable */
#define CAN_IER_EPVIE ((uint32)0x00000200) /* Error Passive Interrupt Enable */
#define CAN_IER_BOFIE ((uint32)0x00000400) /* Bus-Off Interrupt Enable */
#define CAN_IER_LECIE ((uint32)0x00000800) /* Last Error Code Interrupt Enable */
#define CAN_IER_ERRIE ((uint32)0x00008000) /* Error Interrupt Enable */
#define CAN_IER_WKUIE ((uint32)0x00010000) /* Wakeup Interrupt Enable */
#define CAN_IER_SLKIE ((uint32)0x00020000) /* Sleep Interrupt Enable */

/* CAN error status register (CAN_ESR) */
#define CAN_ESR_EWGF ((uint32)0x00000001) /* Error Warning Flag */
#define CAN_ESR_EPVF ((uint32)0x00000002) /* Error Passive Flag */
#define CAN_ESR_BOFF ((uint32)0x00000004) /* Bus-Off Flag */

#define CAN_ESR_LEC ((uint32)0x00000070) /* LEC[2:0] bits (Last Error Code) */
#define CAN_ESR_LEC_0 ((uint32)0x00000010) /* Bit 0 */
#define CAN_ESR_LEC_1 ((uint32)0x00000020) /* Bit 1 */
#define CAN_ESR_LEC_2 ((uint32)0x00000040) /* Bit 2 */

#define CAN_ESR_TEC ((uint32)0x00FF0000) /* Least significant byte of the 9-bit Transmit Error Counter */
#define CAN_ESR_REC ((uint32)0xFF000000) /* Receive Error Counter */

/* CAN bit timing register (CAN_BTR) */
#define CAN_BTR_SJW_POS 24
#define CAN_BTR_TS2_POS 20
#define CAN_BTR_TS1_POS 16

#define CAN_BTR_BRP ((uint32)0x000003FF) /* Baud Rate Prescaler */
#define CAN_BTR_TS1 ((uint32)0x000F0000) /* Time Segment 1 */
#define CAN_BTR_TS2 ((uint32)0x00700000) /* Time Segment 2 */
#define CAN_BTR_SJW ((uint32)0x03000000) /* Resynchronization Jump Width */
#define CAN_BTR_LBKM ((uint32)0x40000000) /* Loop Back Mode (Debug) */
#define CAN_BTR_SILM ((uint32)0x80000000) /* Silent Mode */

/* CAN Mailbox Transmit Request */
#define CAN_TMIDxR_TXRQ ((uint32)0x00000001) /* Transmit mailbox request */

/* CAN Filter Master Register bits */
#define CAN_FMR_FINIT ((uint32)0x00000001) /* Filter init mode */

typedef enum CAN_GPIO_MAP {
CAN_GPIO_PA11_PA12, /* RX to PA11, TX to PA12 */
CAN_GPIO_PB8_PB9, /* RX to PB8, TX to PB9 */
CAN_GPIO_PD0_PD1 /* RX to PD0, TX to PD1 */
} CAN_GPIO_MAP;

typedef enum CAN_STATUS
{
CAN_OK = 0,
CAN_INIT_FAILED,
CAN_INIT_E_FAILED,
CAN_INIT_L_FAILED,
CAN_TX_FAILED,
CAN_TX_PENDING,
CAN_NO_MB,
CAN_FILTER_FULL
} CAN_STATUS;

typedef enum CAN_TX_MBX
{
CAN_TX_MBX0 = 0,
CAN_TX_MBX1 = 1,
CAN_TX_MBX2 = 2,
CAN_TX_NO_MBX = CAN_NO_MB
} CAN_TX_MBX;

#define CAN_MODE_NORMAL ((uint32)0x0) /* normal mode */
#define CAN_MODE_LOOPBACK (CAN_BTR_LBKM) /* loopback mode */
#define CAN_MODE_SILENT (CAN_BTR_SILM) /* silent mode */
#define CAN_MODE_SILENT_LOOPBACK (CAN_BTR_LBKM | CAN_BTR_SILM) /* loopback combined with silent mode */

enum CAN_SPEED {
CAN_SPEED_125,
CAN_SPEED_250,
CAN_SPEED_500,
CAN_SPEED_1000,
};

/**
* CAN_identifier_type
*/
#define CAN_ID_STD ((uint32)0x00) /* Standard Id */
#define CAN_ID_EXT ((uint32)0x04) /* Extended Id */

/**
* CAN_remote_transmission_request
*/
#define CAN_RTR_DATA ((uint32)0x00) /* Data frame */
#define CAN_RTR_REMOTE ((uint32)0x02) /* Remote frame */

/**
* CAN_receive_FIFO_number_constants
*/
typedef enum {
CAN_FIFO0 = 0,
CAN_FIFO1 = 1
} CAN_FIFO;

typedef enum {
CAN_FILTER_32BIT = 0,
CAN_FILTER_16BIT = 1
} CAN_FILTER_SCALE;

typedef enum {
CAN_FILTER_MASK = 0,
CAN_FILTER_LIST = 1
} CAN_FILTER_MODE;
/**
* @brief Controller Area Network TxMailBox
*/
typedef struct
{
volatile uint32 TIR;
volatile uint32 TDTR;
volatile uint32 TDLR;
volatile uint32 TDHR;
} CAN_TxMailBox_Port;

/**
* @brief Controller Area Network FIFOMailBox
*/
typedef struct
{
volatile uint32 RIR;
volatile uint32 RDTR;
volatile uint32 RDLR;
volatile uint32 RDHR;
} CAN_FIFOMailBox_Port;

/**
* @brief Controller Area Network FilterRegister
*/
typedef struct
{
volatile uint32 FR1;
volatile uint32 FR2;
} CAN_FilterRegister_Port;

typedef struct {
volatile uint32 MCR; // CAN master control register (CAN_MCR)
volatile uint32 MSR; // CAN master status register (CAN_MSR)
volatile uint32 TSR; // CAN transmit status register (CAN_TSR)
volatile uint32 RF0R; // CAN receive FIFO 0 register (CAN_RF0R)
volatile uint32 RF1R; // CAN receive FIFO 1 register (CAN_RF1R)
volatile uint32 IER;
volatile uint32 ESR;
volatile uint32 BTR;
uint32 RESERVED0[88];
CAN_TxMailBox_Port sTxMailBox[3];
CAN_FIFOMailBox_Port sFIFOMailBox[2];
uint32 RESERVED1[12];
volatile uint32 FMR;
volatile uint32 FM1R;
uint32 RESERVED2;
volatile uint32 FS1R;
uint32 RESERVED3;
volatile uint32 FFA1R;
uint32 RESERVED4;
volatile uint32 FA1R;
uint32 RESERVED5[8];
CAN_FilterRegister_Port sFilterRegister[14];
} CAN_Port;

/**
* @brief CAN Tx message structure definition
*/
typedef struct
{
uint32 ID; // CAN ID
uint8 IDE; // CAN_ID_STD for standard and CAN_ID_EXT for extended
uint8 RTR;
uint8 DLC;
uint8 Data[8];
uint8 FMI;
} CanMsg;

/* Functions */
CAN_STATUS can_init_enter(CAN_Port* CANx);
CAN_STATUS can_init_leave(CAN_Port* CANx);
CAN_STATUS can_init(CAN_Port *CANx, uint32 mode, uint8 speed);
CAN_STATUS can_deinit(CAN_Port* CANx);
CAN_STATUS can_filter(CAN_Port* CANx, uint8 filter_idx, CAN_FIFO fifo_number, CAN_FILTER_SCALE scale, CAN_FILTER_MODE mode, uint32 fr1, uint32 fr2);
CAN_STATUS can_set_timing(CAN_Port* CANx, uint32 timing);
CAN_STATUS can_set_mode(CAN_Port* CANx, uint32 mode);
CAN_STATUS can_gpio_map(CAN_Port* CANx, CAN_GPIO_MAP map_mode);
CAN_STATUS can_status(void);
void can_cancel(CAN_Port* CANx, uint8 mbx);
void can_rx_queue_clear(void);
uint8 can_rx_available(void);
CanMsg* can_rx_queue_get(void);
CanMsg* can_read(CAN_Port* CANx, CAN_FIFO fifo, CanMsg* msg);
void can_rx_release(CAN_Port* CANx, CAN_FIFO fifo);
void can_rx_queue_free(void);
CAN_TX_MBX can_transmit(CAN_Port* CANx, CanMsg* msg);
CAN_STATUS can_tx_status(CAN_Port* CANx, CAN_TX_MBX mbx);

/**
* @brief Set pooling mode
*/
static inline void can_set_pool_mode(CAN_Port* CANx)
{
CANx->IER &= ~(CAN_IER_FMPIE0 | CAN_IER_FMPIE1);
}

/**
* @brief Set interrupt mode
*/
static inline void can_set_irq_mode(CAN_Port* CANx)
{
CANx->IER |= (CAN_IER_FMPIE0 | CAN_IER_FMPIE1);
}

static inline uint8 can_fifo_ready(CAN_Port* CANx, CAN_FIFO fifo)
{
if (fifo == CAN_FIFO0)
return (uint8)(CANx->RF0R & CAN_RF0R_FMP0);
return (uint8)(CANx->RF1R & CAN_RF1R_FMP1);
}

#ifdef __cplusplus
}
#endif

#endif

Posted 4 years ago #
x893
Member

and of course can.c and HardwareCAN.cpp so use in pde

HardwareCAN CanBus(CAN1_BASE);
...
if (CanBus.map(CAN_GPIO_PB8_PB9) == CAN_OK) // Remap PB8/9 to CAN interface
{
if (CanBus.begin(CAN_SPEED_125, CAN_MODE_LOOPBACK) == CAN_OK)
{
CanBus.filter(0, 0, 0); // Receive all CAN messages to FIFO 0
CanBus.set_pool_mode(); // Set pooling mode
CanMsg msg;
msg.IDE = CAN_ID_STD;
msg.RTR = CAN_RTR_DATA;
... // fill msg Data, ID, DLC
CanBus.send(&msg);

while(!CanBus.fifo_ready(CAN_FIFO0));
CanBus.read(CAN_FIFO0, &msg);
DumpCanMsg(&msg);
CanBus.release(CAN_FIFO0);

CanBus.set_irq_mode(); // use irq mode

while(!CanBus.available());

DumpCanMsg(CanBus.recv());
CanBus.free();
CanBus.end();
}
}

Posted 4 years ago #
mbolivar
LeafLabs

can people *please* stop posting such long code listings in the forum.

put them somewhere else (your website, github gist, pastebin, whatever) and provide a link!

Posted 4 years ago #
tmbomber
Member

You can re-map the CAN peripheral?!?!?!?!??????

ooooOOOOOOOOooooo!!!!!!!

I think I can make use of that.

@x893, Thank you for the code listings. I'm not quite sure what you mean by "and of course can.c and HardwareCAN.cpp so use in pde". Are these part of libmaple core 0.0.9? It's still Thursday night, so I've yet to receive my boards. I'll be installing all the software once I have them. (hopefully tomorrow morning at about 10:30 AM) I'll look for them then.

This is looking *very* promising. I'll keep y'all posted on what I come up with.

Posted 4 years ago #

I'm not publish can.c and HardwareCAN.cpp because it too long (see mbolivar comment - so it last comment with codes) and also need changes in usb.c (because CAN and USB use one interrupt vector). And need add ability to use USB interrupt from application. I change my 0.0.9 version and wait that in 0.0.10 this fuctionality presents (we discuss it in other topic). Need something like this (CAN_IRQ_SUPPORT define if need support USB/CAN share)

/* overloaded ISR routine, this is the main usb ISR */
void __irq_usb_lp_can_rx0(void) {
#ifdef CAN_IRQ_SUPPORT
	if (CAN_RX0_IRQ_Handler())	// return 1 if CAN active
		return;
#endif
	wIstr = _GetISTR();		/* Interrupt status register */

also i add some changes for correct USB enable/disable.

i publish gpio_remap.c and gpio_remap.h in other topic. I see afio_remap in 0.0.10 gpio.c but it always set bits and no functions to reset bits in AFIO_BASE->MAPR...
i port gpio_remap from ST library

1.gpio_remap.c

#include "libmaple.h"
#include "gpio.h"
#include "gpio_remap.h"
#include "util.h"

#define LSB_MASK                    ((uint16)0xFFFF)
#define DBGAFR_POSITION_MASK        ((uint32)0x000F0000)
#define DBGAFR_NUMBITS_MASK         ((uint32)0x00100000)
#define DBGAFR_LOCATION_MASK        ((uint32)0x00200000)
#define DBGAFR_SWJCFG_MASK          ((uint32)0xF0FFFFFF)

#define IDCODE_DEVID_Mask    ((uint32)0x00000FFF)

/**
 *
 *	@param	state	0 = DISABLE, 1 = ENABLE
 */
void gpio_remap(uint32 gpio_remap, uint8 state)
{
	uint32 mask, mapr, mask_03_pos;

	if(gpio_remap & 0x80000000)
		mapr = *(AFIO_MAPR2);
	else
		mapr = *(AFIO_MAPR);

	mask_03_pos = (gpio_remap & DBGAFR_POSITION_MASK) >> 0x10;
	mask = gpio_remap & LSB_MASK;

	if ((gpio_remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK))
	{
		mapr &= DBGAFR_SWJCFG_MASK;
		*(AFIO_MAPR) &= DBGAFR_SWJCFG_MASK;
	}
	else if ((gpio_remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)
	{
		mapr &= ~(((uint32)0x03) << mask_03_pos);
		mapr |= ~DBGAFR_SWJCFG_MASK;
	}
	else
	{
		mapr &= ~(mask << ((gpio_remap >> 0x15) * 0x10));
		mapr |= ~DBGAFR_SWJCFG_MASK;
	}

	if (state != 0)
		mapr |= (mask << ((gpio_remap >> 0x15) * 0x10));

	if(gpio_remap & 0x80000000)
		*(AFIO_MAPR2) = mapr;
	else
		*(AFIO_MAPR) = mapr;
}

/*
	This field indicates the revision of the device:
		In low-density devices:
			– 0x1000 = Revision A
		In medium-density devices:
			– 0x0000 = Revision A
			– 0x2000 = Revision B
			– 0x2001 = Revision Z
			– 0x2003 = Revision Y
		In high-density devices:
			– 0x1000 = Revision A
			– 0x1001 = Revision Z
			– 0x1003 = Revision Y
		In XL-density devices:
			– 0x1000 = Revision A
		In connectivity line devices:
			– 0x1000 = Revision A
			– 0x1001 = Revision Z
*/
uint32 DBGMCU_GetREVID(void)
{
	return (*((volatile uint32*)0x8000000));
	// return((*(DBGMCU_IDCODE)) >> 16);
}

/*
		This field indicates the device ID.
		0x412	low-density devices
		0x410	medium-density devices
		0x414	high-density devices
		0x430	XL-density devices
		0x418	connectivity devices
*/
uint32 DBGMCU_GetDEVID(void)
{
   return(*DBGMCU_IDCODE & IDCODE_DEVID_Mask);
}

2. gpio_remap.h

#ifndef _GPIO_REMAP_H
#define _GPIO_REMAP_H

#ifdef __cplusplus
 extern "C" {
#endif

#define AFIO_MAPR2		((volatile uint32*)0x4001001C)
#define DBGMCU_IDCODE		((volatile uint32*)0xE0042000)
#define DBGMCU_CR		((volatile uint32*)0xE0042004)
/*
	0x80000000	Use MAPR2 register
	0x000F0000	DBGAFR_POSITION_MASK
*/
#define GPIO_Remap_SPI1             ((uint32)0x00000001)	/* SPI1 Alternate Function mapping */
#define GPIO_Remap_I2C1             ((uint32)0x00000002)	/* I2C1 Alternate Function mapping */
#define GPIO_Remap_USART1           ((uint32)0x00000004)	/* USART1 Alternate Function mapping */
#define GPIO_Remap_USART2           ((uint32)0x00000008)	/* USART2 Alternate Function mapping */
#define GPIO_PartialRemap_USART3    ((uint32)0x00140010)	/* USART3 Partial Alternate Function mapping */
#define GPIO_FullRemap_USART3       ((uint32)0x00140030)	/* USART3 Full Alternate Function mapping */
#define GPIO_PartialRemap_TIM1      ((uint32)0x00160040)	/* TIM1 Partial Alternate Function mapping */
#define GPIO_FullRemap_TIM1         ((uint32)0x001600C0)	/* TIM1 Full Alternate Function mapping */
#define GPIO_PartialRemap1_TIM2     ((uint32)0x00180100)	/* TIM2 Partial1 Alternate Function mapping */
#define GPIO_PartialRemap2_TIM2     ((uint32)0x00180200)	/* TIM2 Partial2 Alternate Function mapping */
#define GPIO_FullRemap_TIM2         ((uint32)0x00180300)	/* TIM2 Full Alternate Function mapping */
#define GPIO_PartialRemap_TIM3      ((uint32)0x001A0800)	/* TIM3 Partial Alternate Function mapping */
#define GPIO_FullRemap_TIM3         ((uint32)0x001A0C00)	/* TIM3 Full Alternate Function mapping */
#define GPIO_Remap_TIM4             ((uint32)0x00001000)	/* TIM4 Alternate Function mapping */
													/* CAN1 Alternate Function mapping */
													/* 00: CAN_RX mapped to PA11, CAN_TX mapped to PA12 */
#define GPIO_Remap1_CAN1            ((uint32)0x001D4000)	/* 10: CAN_RX mapped to PB8, CAN_TX mapped to PB9 (not available on 36-pin package) */
#define GPIO_Remap2_CAN1            ((uint32)0x001D6000)	/* 11: CAN_RX mapped to PD0, CAN_TX mapped to PD1 */

#define GPIO_Remap_PD01             ((uint32)0x00008000)	/* PD01 Alternate Function mapping */
#define GPIO_Remap_TIM5CH4_LSI      ((uint32)0x00200001)	/* LSI connected to TIM5 Channel4 input capture for calibration */
#define GPIO_Remap_ADC1_ETRGINJ     ((uint32)0x00200002)	/* ADC1 External Trigger Injected Conversion remapping */
#define GPIO_Remap_ADC1_ETRGREG     ((uint32)0x00200004)	/* ADC1 External Trigger Regular Conversion remapping */
#define GPIO_Remap_ADC2_ETRGINJ     ((uint32)0x00200008)	/* ADC2 External Trigger Injected Conversion remapping */
#define GPIO_Remap_ADC2_ETRGREG     ((uint32)0x00200010)	/* ADC2 External Trigger Regular Conversion remapping */
#define GPIO_Remap_ETH              ((uint32)0x00200020)	/* Ethernet remapping (only for Connectivity line devices) */
#define GPIO_Remap_CAN2             ((uint32)0x00200040)	/* CAN2 remapping (only for Connectivity line devices) */
#define GPIO_Remap_SWJ_NoJTRST      ((uint32)0x00300100)	/* Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST */
#define GPIO_Remap_SWJ_JTAGDisable  ((uint32)0x00300200)	/* JTAG-DP Disabled and SW-DP Enabled */
#define GPIO_Remap_SWJ_Disable      ((uint32)0x00300400)	/* Full SWJ Disabled (JTAG-DP + SW-DP) */
#define GPIO_Remap_SPI3             ((uint32)0x00201000)	/* SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) */
#define GPIO_Remap_TIM2ITR1_PTP_SOF ((uint32)0x00202000)	/* Ethernet PTP output or USB OTG SOF (Start of Frame) connected
                                                                 to TIM2 Internal Trigger 1 for calibration
                                                                 (only for Connectivity line devices) */
#define GPIO_Remap_PTP_PPS          ((uint32)0x00204000)	/* Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) */

#define GPIO_Remap_TIM15            ((uint32)0x80000001)	/* TIM15 Alternate Function mapping (only for Value line devices) */
#define GPIO_Remap_TIM16            ((uint32)0x80000002)	/* TIM16 Alternate Function mapping (only for Value line devices) */
#define GPIO_Remap_TIM17            ((uint32)0x80000004)	/* TIM17 Alternate Function mapping (only for Value line devices) */
#define GPIO_Remap_CEC              ((uint32)0x80000008)	/* CEC Alternate Function mapping (only for Value line devices) */
#define GPIO_Remap_TIM1_DMA         ((uint32)0x80000010)	/* TIM1 DMA requests mapping (only for Value line devices) */

#define GPIO_Remap_TIM9             ((uint32)0x80000020)	/* TIM9 Alternate Function mapping (only for XL-density devices) */
#define GPIO_Remap_TIM10            ((uint32)0x80000040)	/* TIM10 Alternate Function mapping (only for XL-density devices) */
#define GPIO_Remap_TIM11            ((uint32)0x80000080)	/* TIM11 Alternate Function mapping (only for XL-density devices) */
#define GPIO_Remap_TIM13            ((uint32)0x80000100)	/* TIM13 Alternate Function mapping (only for XL-density devices) */
#define GPIO_Remap_TIM14            ((uint32)0x80000200)	/* TIM14 Alternate Function mapping (only for XL-density devices) */
#define GPIO_Remap_FSMC_NADV        ((uint32)0x80000400)	/* FSMC_NADV Alternate Function mapping (only for XL-density devices) */

void gpio_remap(uint32 GPIO_Remap, uint8 NewState);
uint32 DBGMCU_GetREVID(void);
uint32 DBGMCU_GetDEVID(void);

#ifdef __cplusplus
} // extern "C"
#endif

#endif

Posted 4 years ago #

mbolivar
LeafLabs

x893,

I have asked all users to stop pasting long code listings into the forums. We are very grateful for your contributions, but pasting them directly makes the forum posts too long to read easily.

Post your code somewhere else and provide a link to it in the forums in the future.

Edit: example, gpio_remap.h on pastebin:

http://pastebin.com/chVPtS6h

Posted 4 years ago #
poslathian
LeafLabs

Now that it seems stuff is really getting done on this issue (with code samples and all!) perhaps its time to move it over to the wiki?

http://wiki.leaflabs.com/index.php?title=CAN

Posted 4 years ago #
supermac
Member

wow, great post, but it is a bit confusing. Can you put all the necessary files in a zip and upload to the wiki?

Posted 4 years ago #
tmbomber
Member

Wow x893, greatly appreciate the help. I think mbolivar & poslathian are right though, could you upload all this to the wiki? We should probably create a CAN entry. I'll add in all my stuff as I get it working.

My boards are due to arrive tomorrow morning. (shoulda ordered it all UPS blue, then I coulda had some fun over the weekend) I'll be getting the IDE up and running right away. I have a Arduino proto shield that I'll be wiring a '251 driver chip up on almost right away.

Posted 4 years ago #
x893
Member

i can publish but need changes in cores files. I think it's not a easy for ordinal developers.

Posted 4 years ago #
mbolivar
LeafLabs

x893,

Do you need any changes beyond support for using CAN instead of USB in the shared interrupt?

Posted 4 years ago #
x893
Member

Minimum yes, also i fix some errors in 0.0.9 usb library - i not check 0.0.10 in detail, so can't say any about last version.

Posted 4 years ago #

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