dreamcat4
Member
Olimex STM32 development board based on the STM32F107VCT6. It includes ethernet PHY, USB 2.0. Plus they give freely their schematics, and already some code examples (using ST's lwIP stack):
http://www.olimex.com/dev/stm32-p107.html
Cost: $100 US (approx.) with tax and shipping.
A board like this ^^ is suitable to develop network library on, for MapleIDE.
dreamcat4
Member
Olimex uses STE101P ethernet PHY. Which is currently only available in bulk:
http://www.ic2ic.com/search.jsp?sSearchWord=STE101P
The other thing about that chip is its 64 LQFP which is rather large. Wheras most of the ethernet PHY which are available from Digikey / similar come as 24 or 32 pin BGA.
mabl
Member
I have this board here for some experiments. Which PHY is used should not matter, right? Even switching between RMII/MII is just a matter of setting a flag.
I haven't done much with the ethernet yet, though. You can find some more information here: http://forum.chibios.org/phpbb/viewtopic.php?f=3&t=23
dreamcat4
Member
I have this board here for some experiments. Which PHY is used should not matter, right? Even switching between RMII/MII is just a matter of setting a flag.
You should use RMII as thats the newer / better standard. MII is for older devices and requires more pins. As for swapping between PHYs - the electrical interface is the same. Might be differences in their configuration / management control interfaces. Something to check on the data sheets. Yeah its no biggie.
Choosing from the known PHYs - it all comes down to 4 things. Latency, power consumption, cost and availability. STE101P is actually comes out the best except we don't really know the cost and availability of that part. It should be something less than $8..,
Failing that, 3 cheaper PHYs are: Micrel KSZ8041NL which may have lower latency than the LAN8710A/LAN8720A. It hard to say without knowing about ethernet latencies whether LAN8720A is really going to be much slower. We know that those (cheaper) have better quoted ESD than the STE101P. All 4 are similar (full load) power consumption.
dreamcat4
Member
Yes absolutely. The suggestion here is that the Omilex board may work for the purpose. Since its already got the pre-requisites of PHY chip, 50Mhz oscillator and ethernet jack. Alternative: re-solder stm32f107rct6 onto an existing Maple board. Wire up the ethernet components externally.
gbulmer
Moderator
This is cheaper than the Olimex board, or buying a Maple, and re-soldering an STM32F107
http://www.aliexpress.com/product-fm/433362271-ST-ARM-Cortex-M3-STM32F107-Development-Board-network-wholesalers.html
gbulmer
Moderator
poslathian - if you think you can get parts, go STM32F2.
I spoke for an hour or more to ST folks at a trade show recetly - STM32F2 all sorts of small advantages which added together were significant.
But, they did warn that it may take some circuit changes. At the time they said that is detailed in an engineering application note, but I haven't found it :-(
gbulmer
Moderator
I'd prefer a specific Ethernet board.
The STM32F207 Ethernet is 10/100MBits. I'd like to have 100Mbits.
To be able to use the same signal pins when it is an STM32F203 board, those pins would have to come out to a header, or some form of DIY-friendly connector. If the pins are not available on a header, the STM32F203 variant loses pins, in which case folks might want a non-ethernet variant.
When the board is populated with an STM32F207, those header pins are going to be carrying the 100Mbits signal.
I think I'd prefer not to have that 100MBits signal on a header among my other signals unless the signal coupling is very low.
Just my $0.02 worth.
gbulmer
Moderator
I count 23 pins as parts of the ethernet interfaces, though many will not be 100Mbits.
The datasheet says the most a specific interface uses is 17.
The LQFP doesn't give an extra 36 I/O's, it gives 29 more than an LQFP-64. A few are extra ground and power and some for external analogue voltage references.
Some are for better hardware debugging (Trace), which some folks might want on a JTAGy/trace header.
Examples of functions which share those 23 ethernet interfaces' pins include at least 10 ADC inputs, USART2 & 3, Timer 1, 3 & 5, SPI1 & SPI2, I2C2 and CAN2. I may have missed some.
dreamcat4
Member
Those numbers for pin occupation are an overestimation. Since for a while now MII has been deprecated in favour of RMII. The correct choice going forward is RMII for any PHY data bus.
The 9 pins of RMII on the F107/207 are: 25, 26, 32, 48, 51, 52, 16, 33, 34,
+ shared connections which may / may not be non-exclusive. They are RESET, 25Mhz OSC. Wake on lan is not represented, might be covered by RMII bus. Note: Theres no different circuit for 10mbit. Thats acheived by doing 100mbit, for 1/10th of the time.
Lets be specific. Of the 9 pins occupied by RMII, the most significant conflicts are:
USART2 CTS,RTS,TX (23,24,25)
USART3 RX,CK,CTS (48,51,52),
CAN2 RX,TX (51,52),
SPI1 MOSI (32)
TIM1 CH1N (32)
These same pins (its true) are in addition also used by other timers and ADCs and can be looked up further.
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