gruvin - The pin outs are described in the ST documentation, but it is tortuous and contains errors.
Start with RM0008, then the STM32F103xB datasheet, then the Maple pin-out documentation.
I used: "The Definitive Guide to the ARM Cortex-M3" Author: Joseph Yiu
http://www.arm.com/support/resources/arm-books/the-definitive-guide-to-the-arm-cortex-m3.php
to understand how the debugger subsystems are related.
AFAIK, the STM32F103xB datasheet does not explicitly list the debugger pins and purpose; you'd need to know the names of the pin functions already. Their is a hint in Figure 1 which lists all of the MCU functional blocks and their pins, but that isn't enough. Hence start at RM0008.
RM0008 is expicit. See section 31 "Debug support (DBG)" of RM0008; it describes the Debugger ports and pinouts:
http://www.st.com/st-web-ui/static/active/en/resource/technical/document/reference_manual/CD00171190.pdf
This is made more complex to understand because their are two separate debugger interfaces on the STM32F103; JTAG-DP (five signals) and Serial Wire (two signals), which share some pins.
Edit: (corrected references to ARM 10 pin to become generic 20-pin JTAG)
JTAG-DP is normally brought out to a 10-pin header for ARM. Many traditional JTAG debuggers talk to the 10pin ARM header or a 20pin generic JTAG header. STM32's ARM JTAG-DP is 5 JTAG pins: JTMS, JTCK, JTDO, JTDI and nJRESET, which is variously called NJTRST and JNTRST, making it harder to locate the information.
The 8pin header on the Maple is specific to LeafLabs, so you'd need to make an 8-pin to 10-pin ARM adapter, or 8-pin to 20-pin generic JTAG adapter. IIRC there is a thread on this forum where that is discussed, and a forum member has designed and shared a PCB to connected LeafLabs 8pin JTAG to 20pin generic JTAG (not 10-pin ARM).
The other debugger interface is SWJ-DP (Serial Wire/JTAG Debug Port) or just SWD. This is a "two wire" port interface which uses a clock (SWCLK) and a bi-directional data pin (SWDIO). AFAIK, the specifics of the SWD interface is proprietary to ARM, thought other CPU's do have "two wire" interfaces. The two pins shared by JTAG-DP and SWD are called JTMS/SWDIO and JTCK/SWCLK. (JTDO/TRACESWO is a third, but my debugger doesn't use it)
SWD is surfaced as a 6pin header on ST's Discovery and Nucleo boards. ST's Discover and Nucleo boards provide the cheapest hardware debugger for STM32; some of those boards are under $10, which IMHO is outstanding value for money. Those on-board debuggers only implement SWD, and use ST Micro's ST-LINK/V2 protocol over their USB debugger ports.
See section 31 of RM0008 describes the ports and pinouts:
http://www.st.com/st-web-ui/static/active/en/resource/technical/document/reference_manual/CD00171190.pdf
Table 216 in section 31.4.1 lists the mapping for the two debug ports to their two sets of pins.
Here it is, converted to be "mini-friendly':
JTAG-DP to Maple-mini:
STM32 Mini Pin-name Description
PA13: D22 JTMS JTAG Test Mode Selection
PA14: D21 JTCK JTAG Test Clock
PA15: D20 JTDI JTAG Test Data Input
PB3: D19 JTDO JTAG Test Data Output
PB4: D18 NJTRST JTAG Test nReset
SWJ-DP:
STM32 Mini Pin-name Description
PA13 D22 SWDIO Serial Wire Data Input/Output
PA14 D21 SWCLK Serial Wire Clock
optionally:
PB3: TRACESWO TRACESWO if async trace is enabled,
not connected on Discover/Nucleo
It should be straightforward to do the same mapping to Maple.
(Full disclosure: I am not a member of LeafLabs staff)