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		<title>LeafLabs Garden &#187; Topic: BOOT0, BOOT1 and JTAG/Serial Wire Debug</title>
		<link>http://forums.leaflabs.com/topic.php?id=69</link>
		<description>A place to share, learn, and grow...</description>
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		<pubDate>Fri, 22 Jan 2016 00:19:55 +0000</pubDate>
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		<item>
			<title>gbulmer on "BOOT0, BOOT1 and JTAG/Serial Wire Debug"</title>
			<link>http://forums.leaflabs.com/topic.php?id=69#post-378</link>
			<pubDate>Sat, 26 Jun 2010 17:25:54 +0000</pubDate>
			<dc:creator>gbulmer</dc:creator>
			<guid isPermaLink="false">378@http://forums.leaflabs.com/</guid>
			<description>&#60;p&#62;I'm old and doddery, and my eyes are going. Do yo think there is enough room to cut the BOOT1 track, and solder on a switch, or wires to a switch on the current board?&#60;/p&#62;
&#60;p&#62;I strongly agree about avoiding jumper hell, and over complicating things. Especially with younger people who sometimes pull jumpers off, never having seen one before.&#60;br /&#62;
As I wrote earlier, I don't believe a lot of people will need the facility, but it is one of those things which might be handy to know is there.&#60;/p&#62;
&#60;p&#62;You can likely answer this, but I thought booting from SRAM may help with debugging. I assume GDB works with the STM32F, and can set breakpoints if the code is in SRAM. Is that true? Or does it need JTAG anyway, and SRAM doesn't matter?
&#60;/p&#62;</description>
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			<title>poslathian on "BOOT0, BOOT1 and JTAG/Serial Wire Debug"</title>
			<link>http://forums.leaflabs.com/topic.php?id=69#post-361</link>
			<pubDate>Fri, 25 Jun 2010 19:20:56 +0000</pubDate>
			<dc:creator>poslathian</dc:creator>
			<guid isPermaLink="false">361@http://forums.leaflabs.com/</guid>
			<description>&#60;p&#62;You are correct. I am not certain what the uses of booting from embedded SRAM is, but by grounding BOOT 1, we have implictly disabled this. There is a fine line between disabling functions and cornering users and turning the board into a jumper haven with too many configuration options to get started easily. If people have a strong desire/use case for embedded SRAM, well consider jumpering BOOT 1 in the future. I look forwarding to some microsurgery reports!
&#60;/p&#62;</description>
		</item>
		<item>
			<title>gbulmer on "BOOT0, BOOT1 and JTAG/Serial Wire Debug"</title>
			<link>http://forums.leaflabs.com/topic.php?id=69#post-355</link>
			<pubDate>Fri, 25 Jun 2010 17:36:22 +0000</pubDate>
			<dc:creator>gbulmer</dc:creator>
			<guid isPermaLink="false">355@http://forums.leaflabs.com/</guid>
			<description>&#60;p&#62;perry - I agree with you,&#60;br /&#62;
those are the three options that I read in &#34;RM0008 Reference manual&#34;, &#34;Doc ID 13902 Rev 11&#34; section 2.4 &#34;Boot configuration&#34;, and are selected by combinations of high/low on BOOT0 and BOOT1.&#60;/p&#62;
&#60;p&#62;According to the Maple schematic&#60;br /&#62;
&#60;a href=&#34;http://static.leaflabs.com/pub/leaflabs/maple-hardware/rev3/maple-rev3-schematics.pdf&#34; rel=&#34;nofollow&#34;&#62;http://static.leaflabs.com/pub/leaflabs/maple-hardware/rev3/maple-rev3-schematics.pdf&#60;/a&#62;&#60;br /&#62;
Version: 5/25/2010 9:43:50 AM&#60;/p&#62;
&#60;p&#62;BOOT1 is tied to ground, so of the three options, only two are (can be) available.&#60;br /&#62;
I read the two (from that section 2.4) as:&#60;br /&#62;
BOOT1 BOOT0&#60;br /&#62;
     x           0      Main Flash memory Main Flash memory is selected as boot space&#60;br /&#62;
     0           1      System memory System memory is selected as boot space&#60;br /&#62;
and&#60;br /&#62;
     1           1      Embedded SRAM Embedded SRAM is selected as boot space&#60;br /&#62;
as not possible at this step of the boot process.&#60;/p&#62;
&#60;p&#62;Of course, I might be misunderstanding !-) or the LeafLabs folks have done something nifty?
&#60;/p&#62;</description>
		</item>
		<item>
			<title>perry on "BOOT0, BOOT1 and JTAG/Serial Wire Debug"</title>
			<link>http://forums.leaflabs.com/topic.php?id=69#post-353</link>
			<pubDate>Fri, 25 Jun 2010 14:57:52 +0000</pubDate>
			<dc:creator>perry</dc:creator>
			<guid isPermaLink="false">353@http://forums.leaflabs.com/</guid>
			<description>&#60;p&#62;as far as i can recall, depending on the boot pin state, you can boot either into flash, the serial bootloader, or ram. As gbulmer suggested, we can probably solder jump BOOT1 on the next revision if this is a feature people really want to enable booting out of ram.
&#60;/p&#62;</description>
		</item>
		<item>
			<title>poslathian on "BOOT0, BOOT1 and JTAG/Serial Wire Debug"</title>
			<link>http://forums.leaflabs.com/topic.php?id=69#post-352</link>
			<pubDate>Fri, 25 Jun 2010 14:44:46 +0000</pubDate>
			<dc:creator>poslathian</dc:creator>
			<guid isPermaLink="false">352@http://forums.leaflabs.com/</guid>
			<description>&#60;p&#62;I'm not sure that I understand what you guys are talking about, but do be aware that if you hold down the button labeled &#34;BUT&#34; during reset, you boot from SRAM into the serial bootloader. which you can then very easily use to upload a new bootloader without jtag. This feature wasnt in rev1, but were SO HAPPY to have it in rev3. So get bootloader hacking!
&#60;/p&#62;</description>
		</item>
		<item>
			<title>gbulmer on "BOOT0, BOOT1 and JTAG/Serial Wire Debug"</title>
			<link>http://forums.leaflabs.com/topic.php?id=69#post-340</link>
			<pubDate>Fri, 25 Jun 2010 08:32:49 +0000</pubDate>
			<dc:creator>gbulmer</dc:creator>
			<guid isPermaLink="false">340@http://forums.leaflabs.com/</guid>
			<description>&#60;p&#62;I am very pleased I asked because I got the correct conclusion but for the wrong reason!&#60;/p&#62;
&#60;p&#62;So thank you. Yes, BOOT1 is tied to ground, which leads to the boot from SRAM being unavailable.&#60;/p&#62;
&#60;p&#62;I think Maples approach is perfectly right for 99% of people for 100% of the time, and 99% of the time for the other 1%.&#60;br /&#62;
I might like boot from SRAM, if I could upload to SRAM, to make fiddling with a new bootloader easier. &#60;/p&#62;
&#60;p&#62;I think something as big as a pin header would be a waste of board space, and if the jumper came off, cause a lot of headaches. Something small like a solder jumper, which the 1% could remove would be excellent. I'd be willing to cut a track too, though I'd prefer an un-solder/re-solder approach . It'd likely only alter one or two boards for myself and collaborators. Please add two holes so we could add a little switch on a couple of pieces of wire. In a perfect world, they'd be marked on the silkscreen.&#60;/p&#62;
&#60;p&#62;On my design, I'd thought of using GPIO pins to sample a button on BOOT0, to get double duty from the input. I'd realised I could read BOOT1, so I'd convinced myself that I should be able to read the BOOT0 pin too (as GPIO inputs). Some of the Atmel's support this. AFAIKnew, BOOT1 is a GPIO pin, and can be read or written, but I've never found how to read BOOT0.  It didn't seem critical, so I've been trying to find out how whenever I remember. That's partly why I was looking at the Maple schematic. Now I know! BOOT0 can't be read, and why Maple uses the PC9 connection. &#60;/p&#62;
&#60;p&#62;I can see clearly now! A great day.&#60;br /&#62;
Thank you.
&#60;/p&#62;</description>
		</item>
		<item>
			<title>okie on "BOOT0, BOOT1 and JTAG/Serial Wire Debug"</title>
			<link>http://forums.leaflabs.com/topic.php?id=69#post-336</link>
			<pubDate>Fri, 25 Jun 2010 06:25:38 +0000</pubDate>
			<dc:creator>okie</dc:creator>
			<guid isPermaLink="false">336@http://forums.leaflabs.com/</guid>
			<description>&#60;p&#62;That was a mistake, and in the future, I think it's best to leave as many options such as this as open as possible. Shipping the board with common defaults make sense, of course.&#60;/p&#62;
&#60;p&#62;I don't believe BOOT0 is tied to BOOT1; it's tied to PC9, and BOOT1 is tied to ground. The thinking here with PC9 is that you can read the state of the button and use it for other things besides boot modes. Do you think there should be a pin or solder jumper selection for connecting BOOT1 to either ground or VCC with ground being the default?
&#60;/p&#62;</description>
		</item>
		<item>
			<title>gbulmer on "BOOT0, BOOT1 and JTAG/Serial Wire Debug"</title>
			<link>http://forums.leaflabs.com/topic.php?id=69#post-333</link>
			<pubDate>Fri, 25 Jun 2010 04:48:18 +0000</pubDate>
			<dc:creator>gbulmer</dc:creator>
			<guid isPermaLink="false">333@http://forums.leaflabs.com/</guid>
			<description>&#60;p&#62;I was skimming over the schematic, and I noticed BOOT0 &#38;amp; BOOT1 are tied together. There are three boot 'modes' on the STM32F103's, and the one made impossible by forcing BOOT1 == BOOT0 is booting from SRAM.&#60;/p&#62;
&#60;p&#62;I should say, that as far as I could work out, booting from SRAM is relatively complex to set up, so it isn't something that I'd expect the vast majority of folks to want to do, ever. But, I think Pete Harrison found one of the development environments would do it 'for you'. So, most probably not relevant to anyone using the Arduino-style development path.&#60;/p&#62;
&#60;p&#62;Do any folks know of any software-only tools which take advantage of running from SRAM to support debugging, e.g. by allowing instructions to be changed, to insert a 'breakpoint'? AFAIK, when running from flash, debugging with breakpoints is only supported with hardware debugging otherwise (on the STM32F).&#60;/p&#62;
&#60;p&#62;On a closely related topic, what hardware debugging support do folks use? I assume JTAG, but which ones work well for you (not on Windows)? I'd prefer over USB.&#60;br /&#62;
Does anyone have a low-cost hardware which uses the Serial Wire Debug Port (SW-DP)? Again, not on Windows.
&#60;/p&#62;</description>
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