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		<title>LeafLabs Garden &#187; Topic: Puzzling GPIO Behaviour</title>
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		<pubDate>Fri, 22 Jan 2016 00:25:48 +0000</pubDate>
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		<item>
			<title>jpopadic on "Puzzling GPIO Behaviour"</title>
			<link>http://forums.leaflabs.com/topic.php?id=74048#post-104779</link>
			<pubDate>Mon, 14 Oct 2013 04:58:33 +0000</pubDate>
			<dc:creator>jpopadic</dc:creator>
			<guid isPermaLink="false">104779@http://forums.leaflabs.com/</guid>
			<description>&#60;p&#62;Hi gbulmer,&#60;/p&#62;
&#60;p&#62;Thanks for the reply.&#60;/p&#62;
&#60;p&#62;I'm using a logic analyzer to investigate the behaviour of the pins.&#60;/p&#62;
&#60;p&#62;I stripped the problem down to the simplest I could and still see the issue. I may have an explanation for what's going wrong and it doesn't appear to be related to the MCU:&#60;/p&#62;
&#60;p&#62;I'm driving my columns using open-drain outputs and pull-up resistors so MOSFETs sourcing a (~1 volt) higher voltage will switch properly).  Stray capacitance (I'm measuring around 400pF) and the relatively high value of the pull-ups (10k) should be able to introduce a delay in the neighborhood of a couple of microseconds.&#60;/p&#62;
&#60;p&#62;It looks like I either need to account for the delay by shuffling some code around or decrease the value of my pull-ups.&#60;/p&#62;
&#60;p&#62;Thanks for your time!  Sorry it was a red herring.
&#60;/p&#62;</description>
		</item>
		<item>
			<title>gbulmer on "Puzzling GPIO Behaviour"</title>
			<link>http://forums.leaflabs.com/topic.php?id=74048#post-104760</link>
			<pubDate>Fri, 11 Oct 2013 05:45:35 +0000</pubDate>
			<dc:creator>gbulmer</dc:creator>
			<guid isPermaLink="false">104760@http://forums.leaflabs.com/</guid>
			<description>&#60;p&#62;jpopadic - How do you know that the behaviour described is happening? Do you have an oscilloscope or something?&#60;/p&#62;
&#60;p&#62;Could the effect be some other cause?&#60;br /&#62;
For example, the spi.write might not complete until after several digitalWrites, which may cause very weird behaviour, maybe even latching an incomplete pattern into the shift registers.&#60;/p&#62;
&#60;p&#62;If you change the sequence of NOPs to delay(1), and put a delay(1) in front of&#60;br /&#62;
&#60;pre&#62;&#60;code&#62;// Latch row data
digitalWrite(LE, HIGH);
digitalWrite(LE, LOW);&#60;/code&#62;&#60;/pre&#62;
&#60;p&#62;does it change the behaviour?&#60;br /&#62;
That might indicate a 'race condition', where the spi write is taking too long.&#60;/p&#62;
&#60;p&#62;I can't see the arithmetic for gColumn, we need to see that to understand how it all works.&#60;/p&#62;
&#60;p&#62;Have you tried a simpler test? For example, load the shift registers once, and then only change the column drive. Does the problem show up when spi.write isn't being used?
&#60;/p&#62;</description>
		</item>
		<item>
			<title>jpopadic on "Puzzling GPIO Behaviour"</title>
			<link>http://forums.leaflabs.com/topic.php?id=74048#post-104759</link>
			<pubDate>Fri, 11 Oct 2013 04:39:48 +0000</pubDate>
			<dc:creator>jpopadic</dc:creator>
			<guid isPermaLink="false">104759@http://forums.leaflabs.com/</guid>
			<description>&#60;p&#62;Hi all.  I have a bit of a puzzle for you all.&#60;/p&#62;
&#60;p&#62;The hardware background, in brief, is a 16x16 LED matrix with common anode columns sourced by mosfets controlled by individual IO pins. The rows are sunk by constant current output shift registers.  The code below is part of a timer interrupt handler.&#60;/p&#62;
&#60;p&#62;I am seeing strange behaviour from the IO pins controlling the column drivers. In the code below, column n-1 is being driven high a few instructions before column n is driven low. For some unknown reason, the behaviour of the actual pins has the transition of column n-1 delayed significantly - it looks like what I'd expect if the digitalWrite instruction for &#34;lastColumn&#34; were at the end of the block.&#60;/p&#62;
&#60;p&#62;Got any ideas?  I'm stumped.&#60;/p&#62;
&#60;pre&#62;&#60;code&#62;// Blank row
  digitalWrite(OE, HIGH); // (active low)

  // Send row data via SPI
  const int bitplaneOffset = gBitplane * BITPLANE_SIZE;
  const int columnOffset   = gColumn * 2;
  // Red first
  spi.write(pFrontBuffer[bitplaneOffset + columnOffset + 1]);
  spi.write(pFrontBuffer[bitplaneOffset + columnOffset]);
  // Then green
  spi.write(pFrontBuffer[HALFPLANE_SIZE + bitplaneOffset + columnOffset + 1]);
  spi.write(pFrontBuffer[HALFPLANE_SIZE + bitplaneOffset + columnOffset]);
  // Wait for data to arrive.
  NOP
  NOP
  NOP
  NOP

  // Extinguish last column driver
  int lastColumn = gColumn - 1;
  if(lastColumn &#38;lt; 0)
    lastColumn = Constants::FrameWidth-1;
  digitalWrite(colPins[lastColumn], HIGH); // (active low) &#38;lt;-------- write here...

  // Latch row data
  digitalWrite(LE, HIGH);
  digitalWrite(LE, LOW);

  // Light the current column
  digitalWrite(colPins[gColumn], LOW); // (active low)

  // Re-enable row drivers
  digitalWrite(OE, LOW);  // (active low)

                                                            &#38;lt;-------- pin changes here&#60;/code&#62;&#60;/pre&#62;</description>
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