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		<title>LeafLabs Garden &#187; Topic: Maple GPIO Pin Mapping Mega Table Enhancement</title>
		<link>http://forums.leaflabs.com/topic.php?id=203</link>
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		<pubDate>Fri, 22 Jan 2016 00:19:32 +0000</pubDate>
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		<item>
			<title>mbolivar on "Maple GPIO Pin Mapping Mega Table Enhancement"</title>
			<link>http://forums.leaflabs.com/topic.php?id=203#post-1456</link>
			<pubDate>Thu, 30 Sep 2010 02:26:03 +0000</pubDate>
			<dc:creator>mbolivar</dc:creator>
			<guid isPermaLink="false">1456@http://forums.leaflabs.com/</guid>
			<description>&#60;p&#62;not enough time to get it in for the 0.0.7 release, but definitely before 0.1.0.&#60;/p&#62;
&#60;p&#62;you can track the issue here:&#60;br /&#62;
&#60;a href=&#34;http://redmine.leaflabs.com/issues/411&#34; rel=&#34;nofollow&#34;&#62;http://redmine.leaflabs.com/issues/411&#60;/a&#62;
&#60;/p&#62;</description>
		</item>
		<item>
			<title>gbulmer on "Maple GPIO Pin Mapping Mega Table Enhancement"</title>
			<link>http://forums.leaflabs.com/topic.php?id=203#post-1413</link>
			<pubDate>Mon, 27 Sep 2010 08:09:41 +0000</pubDate>
			<dc:creator>gbulmer</dc:creator>
			<guid isPermaLink="false">1413@http://forums.leaflabs.com/</guid>
			<description>&#60;p&#62;If there are extra columns to be added to the GPIO Mega Table, may I vote for adding the Arduino header pin map?&#60;br /&#62;
I'd like it to be close to the left-hand side, and show, in one column, the primary Arduino pin name, and function (ADC) or PWM, as on an Arduino silk-screen. It seems like a friendly thing to do&#60;/p&#62;
&#60;p&#62;Ideally, add the I2C/SPI annotation too, but probably not the whole shebang of input capture pins, external clocks, etc.&#60;/p&#62;
&#60;p&#62;It might help folks to look at how they might move Arduino libraries and shields to Maple.
&#60;/p&#62;</description>
		</item>
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			<title>gbulmer on "Maple GPIO Pin Mapping Mega Table Enhancement"</title>
			<link>http://forums.leaflabs.com/topic.php?id=203#post-1412</link>
			<pubDate>Mon, 27 Sep 2010 08:03:06 +0000</pubDate>
			<dc:creator>gbulmer</dc:creator>
			<guid isPermaLink="false">1412@http://forums.leaflabs.com/</guid>
			<description>&#60;p&#62;If that page is to be improved, you might want to change&#60;/p&#62;
&#60;blockquote&#62;&#60;p&#62;The current and voltage limitations have not been copied over from the stm32 datasheet; see that reference linked at the bottom. In particular a number of GPIO pins are 5v tolerant (which means that applying 5v to a pin and reading it as input or allowing it to drain to ground will not damage that pin), while some are not.&#60;/p&#62;&#60;/blockquote&#62;
&#60;p&#62;Because there is now a column which does show 5V tolerance, maybe to&#60;/p&#62;
&#60;blockquote&#62;&#60;p&#62;Some GPIO pins are 5v tolerant (which means that applying 5v to a pin and reading it as input or allowing it to drain to ground will not damage that pin), while some are not. This is indicated by the &#34;5V okay&#34; column. This is copied from the STM32F documents, so you may want to double check their in case we have made a mistake.&#60;/p&#62;
&#60;p&#62;The current limitations have not been copied over from the stm32 datasheet; see that reference linked at the bottom. In particular some of the pins are only capable of sinking or sourcing a few mA.&#60;/p&#62;&#60;/blockquote&#62;</description>
		</item>
		<item>
			<title>leaflabsandy on "Maple GPIO Pin Mapping Mega Table Enhancement"</title>
			<link>http://forums.leaflabs.com/topic.php?id=203#post-1410</link>
			<pubDate>Sat, 25 Sep 2010 12:46:07 +0000</pubDate>
			<dc:creator>leaflabsandy</dc:creator>
			<guid isPermaLink="false">1410@http://forums.leaflabs.com/</guid>
			<description>&#60;p&#62;Under Maple Docs: GPIO - Pin Mapping Mega Table&#60;/p&#62;
&#60;p&#62;Could you add the following when IDE 0.0.7 is released:&#60;/p&#62;
&#60;p&#62;#1. Between Timer/I2C add &#34;PWM&#34; column and indicate by YES all 15 PWM channels. &#60;/p&#62;
&#60;p&#62;#2. After the 5v OK? column add new columns &#34;EXTI&#34;, &#34;RISING&#34;, &#34;FALLING&#34;, &#34;HIGH&#34; &#38;amp; &#34;LOW&#34; - used for the external interrupts. Under EXTI is the &#34;channel number&#34; and the other columns are Yes/No.&#60;/p&#62;
&#60;p&#62;Will level interrupts HIGH/LOW be used in the 0.0.7 release? If not, disreguard the last two columns.&#60;/p&#62;
&#60;p&#62;#3. Between &#34;Pin/Stm32 Pin&#34; columns add &#34;Location&#34; column. The &#34;Location&#34; column will have 8 pin hdr., 6 pin hdr., external hdr., or special (for the Maple rev. 5)&#60;/p&#62;
&#60;p&#62;--------------------------------------------------------------------------------&#60;/p&#62;
&#60;p&#62;Enable external interrupts on all Maple GPIOs.&#60;/p&#62;
&#60;p&#62;Extend the wirish attachInterrupt() and detachInterrupt() interface to&#60;br /&#62;
work with all GPIOs.&#60;/p&#62;
&#60;p&#62;Note: The STM32 external interrupt lines are multiplexed between GPIO&#60;br /&#62;
ports. While any GPIO can be used as an external interrupt, not all of&#60;br /&#62;
them can be used at the same time. Each EXTI[n] line selects between&#60;br /&#62;
PA[n], PB[n], PC[n], etc. For example, line EXTI5 can be used with STM32&#60;br /&#62;
pins PA5, PB5, or PC5, but not all at the same time. See table:&#60;/p&#62;
&#60;p&#62;EXTI Line       Maple Pin       STM32 Pin&#60;br /&#62;
  0             D2              PA0&#60;br /&#62;
  0             D27             PB0&#60;br /&#62;
  0             D15             PC0&#60;br /&#62;
  1             D3              PA1&#60;br /&#62;
  1             D28             PB1&#60;br /&#62;
  1             D16             PC1&#60;br /&#62;
  2             D1              PA2&#60;br /&#62;
  2             D17             PC2&#60;br /&#62;
  2             D25             PD2&#60;br /&#62;
  3             D0              PA3&#60;br /&#62;
  3             D18             PC3&#60;br /&#62;
  4             D10             PA4&#60;br /&#62;
  4             D19             PC4&#60;br /&#62;
  5             D13             PA5&#60;br /&#62;
  5             D4              PB5&#60;br /&#62;
  5             D20             PC5&#60;br /&#62;
  6             D12             PA6&#60;br /&#62;
  6             D5              PB6&#60;br /&#62;
  6             D35             PC6&#60;br /&#62;
  7             D11             PA7&#60;br /&#62;
  7             D9              PB7&#60;br /&#62;
  7             D36             PC7&#60;br /&#62;
  8             D6              PA8&#60;br /&#62;
  8             D14             PB8&#60;br /&#62;
  8             D37             PC8&#60;br /&#62;
  9             D7              PA9&#60;br /&#62;
  9             D24             PB9&#60;br /&#62;
  9             D38             PC9 (BUT)&#60;br /&#62;
 10             D8              PA10&#60;br /&#62;
 10             D29             PB10&#60;br /&#62;
 10             D26             PC10&#60;br /&#62;
 11             D30             PB11&#60;br /&#62;
 12             D31             PB12&#60;br /&#62;
 13             D32             PB13&#60;br /&#62;
 13             D21             PC13&#60;br /&#62;
 14             D33             PB14&#60;br /&#62;
 14             D22             PC14&#60;br /&#62;
 15             D34             PB15&#60;br /&#62;
 15             D23             PC15
&#60;/p&#62;</description>
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